1. Field of the Invention
The present invention relates to an epitaxial wafer for manufacture of an image pickup device and a manufacturing method thereof.
2. Description of the Related Art
As a silicon wafer used for a solid state image pickup device, an epitaxial wafer that can uniform in-plane or inter-wafer resistivities is used in order to generate carriers by a photoelectric effect at the time of forming a photodiode (image pickup device) or assure a uniform operation at the time of storing the carriers with the use of a square well potential. Although the photodiode is formed in this epitaxial layer, a two-layer epitaxial layer or a multilayer epitaxial layer in which an epitaxial layer with a low resistivity is formed below a layer in which a photodiode is formed may be used in order to allow an unnecessary electric charge to flow from the photodiode. For example, a structure called n/n+/n in which an epitaxial layer with a low resistivity (an n+ layer: which is often expressed with adding “+” since an amount of dopant is high) is grown on an n-type silicon wafer and an epitaxial layer with a ordinary resistivity is grown thereon is relatively often used.
As characteristics concerning a silicon wafer for manufacture of an image pickup device, there is a gettering technique. In an image pickup device, an image defect which is called a white scratch may be produced in some cases, and it is known that this defect is caused due to an impurity or the like. As a technique for avoiding this impurity, there is known a gettering technique for capturing an impurity in a strain field
with using a thermal environment during manufacture of an image pickup device by forming an oxide precipitate (BMD) in a silicon wafer (intrinsic gettering) or forming a mechanical damage or strain to a lower surface side of the silicon wafer (extrinsic gettering). In the silicon wafer for manufacture of an image pickup device, there is used a method disclosed in Patent Literatures 1 and 2 and others for doping a carbon and improving (increasing and controlling) a BMD in order to further enhance this gettering capability.
As characteristics concerning the epitaxial layer, not only uniformity of the resistivity but also a thickness of the epitaxial is characteristic. Although a photodiode is formed in the epitaxial layer, a photoelectric effect is caused by lights condensed by a lens and color-coded by color filters in this portion, and the number of carriers produced by this effect is detected as intensity of the lights. Although a penetration depth of light differs depending on each wavelength, and a depth that allows intensity of light to be a half is approximately 0.3 μm in case of blue, and it is approximately 3 μm in case of red. Since a value of approximately 3 μm is required for a thickness of the epitaxial layer at minimum in order to efficiently receive light of a red color, a value of 4 μm or more is required when this depth is added to a region which is formed below the epitaxial layer and from which carriers are discharged, and it is general to grow the epitaxial layer with the thickness more than a thickness of a epitaxial layer that is often used for a memory or a logic. As a disclosure example of a thick epitaxial layer, there is almost no discussion about the thickness of the epitaxial layer in Patent Literatures 3 to 5, but 2 to 10 μm or 1 to 20 μm is described. Further, Patent Literatures 6 and 7 have a description of a thickness of the epitaxial layer that is 11 μm or 12 μm in examples, and an example using a thick epitaxial layer for an image pickup device is also present in the past. However, when the thickness of the epitaxial layer is grown to be thick, a cost thereby rises, the thickness of the epitaxial layer cannot be increased limitlessly, and hence approximately 4 to 6 μm is a realistic thickness as a thickness of a real epitaxial layer actually used for an image pickup device.
However, in recent years, it has been revealed that a distribution of an impurity contained in a silicon wafer causes an adverse effect. The silicon wafer is generally sliced out from silicon single crystal grown by a CZ method (including an MCZ method). In such a crystal growth method, a silicon raw material is molten in a quartz crucible, and the silicon single crystal is grown from this material, and each oxygen atom that has eluted from the quartz crucible is contained in the silicon single crystal with a supersaturation state. This oxygen atom is useful as a BMD of the intrinsic gettering. That is, each excessive oxygen atom in the silicon single crystal reacts with Si and precipitates in the silicon single crystal with the form of SiO2 via a thermal process in manufacture of a device or the like. This is called the BMD (Bulk Micro Defect).
Furthermore, besides the oxygen atom, a dopant is contained in the silicon single crystal based on the CZ method in order to control a resistivity. Atoms such as B in the group 3 or P, As, and Sb in the group 5 are general. Further, a carbon atom is also contained as an impurity in the silicon single crystal having carbon doped therein. These dopants or the oxygen/carbon atoms are taken into the silicon single crystal by segregation. However, impurity concentration in the silicon single crystal is non-uniform due to a point that concentration in an impurity in a silicon melt is not completely uniform, a point that an effective segregation coefficient varies in tandem with a growth rate since the growth rate is not fixed but fluctuates in accordance with a fluctuation in a temperature in a furnace or a diameter of crystal. At this time, since a growth interface of the silicon single crystal is not flat but generally has an upwardly protruding shape and the silicon single crystal is grown while rotating it, and hence a concentric circular striation-like concentration distribution is formed. This is called a striation or a growth striation.
In recent years, it has been revealed that a defect that coincides with this concentration is produced on an image pickup device. As contents of a defect includes a dark current in which a carrier is generated even though light does not enter or an abnormality of an energy barrier height at the time of storing generated electric charges in a square well potential. Therefore, a striation-like impurity distribution must be reduced during the single crystal growth. As technology for this, Patent Literature 8 suggests to suppress growth rate within a fixed range.
Patent Literature 1: Japanese Unexamined Patent Application Publication No. 2001-102384
Patent Literature 2: Japanese Unexamined Patent Application Publication No. 2001-237247
Patent Literature 3: Japanese Unexamined Patent Application Publication No. 2009-212351
Patent Literature 4: Japanese Unexamined Patent Application Publication No. 2009-212352
Patent Literature 5: Japanese Unexamined Patent Application Publication No. 2011-82443
Patent Literature 6: Japanese Unexamined Patent Application Publication No. Hei 6-163410
Patent Literature 7: Japanese Unexamined Patent Application Publication No. Hei 10-41311
Patent Literature 8: Japanese Unexamined Patent Application Publication No. 2009-274888